When it comes to designing computer chips, one of the more laborious yet highly important tasks is laying out the components in what is called a chip floorplan. Where all the physical parts go can have a massive impact, affecting power consumption, performance, and chip area. Getting this just right to min-max the design can take time even for skilled engineers, but if an AI could be trained to do it, then it could save time and costs.
In a paper published yesterday, Google researchers report that they have been able to use AI trained with reinforcement learning to “demonstrate state-of-the-art results on chip floor planning.” In short, the AI is trained on past chip floor planning experiences so it can “become better and faster at solving new instances of the problem, allowing chip design to be performed by artificial agents with more experience than any human designer.” Subsequently, the AI “generates manufacturable chip floorplans in under 6h, compared to the strongest baseline, which requires months of intense effort by human experts.”
With these results, Google is using AI in production for its next-generation of Tensor Processing Units (TPUs). Hopefully, this active use of AI will speed up the supply chain and lead to developments in the semiconductor industry that we could not have thought of previously. In any case, let us know what you think of this application of AI in the comments below.